In recent years, along with size and thickness reductions of an electronic device, thickness reduction of a wiring board mounted in an electronic device is required. There is a flexible printed wiring board as an example of such a wiring board. Because a flexible printed wiring board has flexibility, it is possible to considerably deform the flexible printed wiring board; and even in a case where a space in an electronic device becomes small because of size and thickness reductions of the electronic device, it becomes possible to mount components in the small space.
A semiconductor device including a wiring board which is the above conventional example is shown in FIG. 7. FIG. 7 is a top view showing the semiconductor device as the conventional example. With reference to FIG. 7, in the semiconductor device 100 as the conventional example, an integrated circuit chip 102 (hereinafter, described as an IC chip), and discrete components 103a-103i such as a capacitor, a transistor, a diode and the like are mounted on a wiring board 101.
Here, FIG. 8 shows an enlarged top view of a portion where the IC chip is placed in the semiconductor device as the conventional example. Besides, FIG. 9 shows a sectional view along a G-H line in FIG. 8. As shown in FIG. 8, the wiring board 101 includes a substrate 111. On the substrate 111, wiring layers 105-108 that have predetermined wiring patterns are formed. The wiring layers 105-108 are extended inside a mount region where the IC chip 102 is mounted; and a solder resist 109 that protects the wiring layers 105-108 is formed around the mount region. Because of this, part of the wiring layers 105-108 are in a state to be exposed in the mount region where the IC chip 102 is mounted. Besides, on the substrate 111, the IC chip 102 is so placed as to cover the exposed part of the wiring layers 105-108. And, a bump electrode 110 (see FIG. 9) disposed on a lower surface of the IC chip 102 is joined to the wiring layers 105-108, so that the wiring board 101 and the IC chip 102 are electrically connected to each other. Specifically, as shown in FIG. 9, the wiring layers 105a and 107a come into contact with the bump electrodes 110a and 110b, respectively, so that the wiring board 101 and the IC chip 102 are electrically connected to each other.    Patent document 1: JP-A-2004-193277